Simon Hu - Design Notebook (Fall 2025)

Week 2 (Sep 15- Sep 21)

• Read Risc 16 datasheet
• Understood Program counter
• Wrote code for p.c. of Risc 16
• Compared the code with group partners
• Uploaded the code to github repo (https://github.com/1fHu/ProcessorDesign/blob/main/pc16.v)
• Finished HDLBits Vector

Week 1 (Sep 9–Sep 14)

• Doing onboarding and finshed repo setup
• finished HDLBits Getting Started and Verilog language basics