- Attended the introductory meeting.
- Went through the setup instructions, since I use a Linux machine and have designed hardware before, I did not have to make many changes.
- Was unable to get to the onboarding labs this week but will work more over the next week(s).
- I completed the first three onboarding labs, which are linked here.
- I aim to complete more of the onboarding labs next week.
- I was busy this week so only did some SystemVerilog review this week.
- Attended the Wednesday meeting.
- Completed the onboarding labs.
- Read the first paper (About the CPU core).
- Get to the next paper next week.
- Read the second paper (about the toolchains)
- Attended the full team meeting
- Chose the AMBA subteam
- Busy with project work so not much done
- Getting more comfortable with SystemVerilog
- Met with teammates to discuss which MPW we would be proposing
- Decided on an FPU (Floating Point Unit)
- I chose to present on placement, routing and verification
- Read up on open-source placement, routing and verification tools
- Presented our work on Saturday (05/02)